Dr. Vineet Kumar is a Postdoctoral Researcher at the University of Limerick, Ireland. His current research focuses on Generative AI (GenAI) and Agentic AI-driven digital hardware design, with an emphasis on developing intelligent and automated methodologies for hardware design, optimization, and verification. His broader research interests include energy-efficient AI accelerators, RISC-V-based computing systems, FPGA-based digital system design, and dedicated hardware architectures for image and signal processing.
Before joining the University of Limerick, he held postdoctoral research positions at University College Dublin, Ireland, and the Norwegian University of Science and Technology (NTNU), Norway, where he was an ERCIM Postdoctoral Fellow. He received his Ph.D. from the Birla Institute of Technology and Science (BITS), Pilani, India, specializing in FPGA-based hardware acceleration for iris recognition and image processing applications.
His research spans the design and implementation of specialized hardware architectures for computationally intensive applications, with particular emphasis on energy efficiency, hardware utilization, and computational performance. His previous work includes RISC-V-based System-on-Chip architectures for deep learning inference, custom instruction extensions for edge AI, and bit-serial computing architectures for resource-constrained embedded systems.
Dr. Kumar has published his research in international journals and conferences, including ACM Transactions on Embedded Computing Systems, IET Image Processing, Journal of Signal Processing Systems, and the IEEE International System-on-Chip Conference.
He also has extensive teaching experience in digital logic design, computer architecture, microprocessors, embedded systems, and VLSI design, having previously served in academic positions at BITS Pilani, the University of Delhi, and CVR College of Engineering, India.
His current research aims to leverage Generative AI and autonomous AI agents to transform traditional digital hardware design workflows, enabling more efficient, automated, and intelligent development of next-generation computing systems.
Bare-Metal RISC-V + NVDLA SoC for Efficient Deep Learning Inference
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