Rajkumar Sarma


Rajkumar Sarma

Dr. Rajkumar Sarma is currently a Research Fellow at Lero, the SFI Research Centre for Software, at the University of Limerick, Ireland. He completed his PhD at Lovely Professional University, Punjab, India, in June 2020. Dr. Sarma is currently involved in an Lero platform project called AutoCircuit, which focuses on developing a machine learning-based system that autonomously generates digital circuits from user-specified design requirements using a front-end UI. His research interests include, but are not limited to, Analog and Digital VLSI design, Low-power architecture design, Quantum Cellular Automata, and FPGA-based prototype development. His recent work involves designing a Grammatical Evolution (GE)-based synthesizable HDL code generator and developing an efficient Multiply-Accumulate (MAC) architecture compatible with IEEE half-precision and single-precision floating-point inputs.
Dr. Sarma has expertise in various Cadence tools such as Virtuoso, Assura, Genus, Innovus, and Jasper Gold Superlint App. He is also proficient with AMD Xilinx ISE/Vivado tools for FPGA prototyping on 7-series FPGA boards. He has made significant contributions to the Science Foundation Ireland (SFI)-funded Automatic Design of Digital Circuits (ADDC) project, achieving the world's first ML-generated ASIC, prototyped on an FPGA and fabricated using TSMC 65 nm technology. His responsibilities in the ADDC project included FPGA realization, SPI interfacing, synthesis, physical implementation using Cadence tools, and functional testing of fabricated chips.
Dr. Sarma has authored more than 25 research publications in reputable journals and conferences, including Neural Computing and Applications (NCAA) and CMC-Computers, Materials, and Continua. His work on multiplier architectures, MAC architectures, and normalization-based architectures for floating-point arithmetic has been widely recognized in peer-reviewed publications. Additionally, he has published four books on Hardware Description Languages (HDL), FPGA prototyping, and other VLSI-related topics. His innovative contributions to the field are further demonstrated by his numerous patents, covering topics ranging from compressor-based multiplier circuits to anti-theft security systems for vehicles. Notably, one of his patents on a Signed Floating Point MAC Architecture (SFMAC) was recently granted by the Indian Patent Office (IPO).
Dr. Sarma has over 12 years of teaching and research experience. As a supervisor, he has guided numerous postgraduate theses and undergraduate final-year projects (FYP), leading to successful research outcomes and subsequent publications. His dedication to student development is evident in the positive contributions his students have made in the IC design and testing industry.